A New Modeling Method for DC-DC Converter Based on Verilog-A

A new modeling method for DC-DC converter based on Cadence platform and Verilog-A is proposed in this paper. It provides a continuous-time model for system design, in which the transistor-level power stage, the compensation network and the error amplifier could be put together in, therefore provides accurate prediction of system loop transfer function frequency response. In addition, the properly adjusted transistor-level key building blocks in the proposed continuous-time model can be directly used in the later all transistor-level system, which leads to a seamless design flow within the Cadence design platform.